共 50 条
- [2] Analysis and comparison of low-voltage CML D-Latch [J]. ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, 2002, : 737 - 740
- [4] Analysis and Design of Low-Power Reversible Carry Select Adder Using D-Latch [J]. 2016 IEEE INTERNATIONAL CONFERENCE ON RECENT TRENDS IN ELECTRONICS, INFORMATION & COMMUNICATION TECHNOLOGY (RTEICT), 2016, : 1917 - 1920
- [5] Low-Voltage Low-Power CMOS Design [J]. 2016 INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (INDEL), 2016,
- [6] Low-voltage low-power LVDS drivers [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (02) : 472 - 479
- [7] Low-voltage, low-power basic circuits [J]. ANALOG CIRCUIT DESIGN: RF CIRCUITS: WIDE BAND, FRONT-ENDS,DAC'S, DESIGN METHODOLOGY AND VERIFICATION FOR RF AND MIXED-SIGNAL SYSTEMS, LOW POWER AND LOW VOLTAGE, 2006, : 295 - +
- [8] Unique Robust Fault Resistant D-Latch for Low Power Applications [J]. 2017 INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATIONS AND ELECTRONICS (COMPTELIX), 2017, : 16 - 20
- [9] A novel low-voltage and low-power bandgap voltage reference [J]. PROCEEDINGS OF THE 2015 2ND INTERNATIONAL CONFERENCE ON ELECTRICAL, COMPUTER ENGINEERING AND ELECTRONICS (ICECEE 2015), 2015, 24 : 746 - 751