Physical Limitations and Technological Barriers in Development of MOS VLSI Circuits.

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作者
Jakubowski, Andrzej [1 ]
Swit, Alfred [1 ]
机构
[1] Politechnika Warszawska, Inst, Technologii Elektronowej, Warsaw,, Pol, Politechnika Warszawska, Inst Technologii Elektronowej, Warsaw, Pol
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Elektronika Warszawa | 1984年 / 25卷 / 06期
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76
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页码:14 / 22
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