Automatic controller extractor for HDL descriptions at the RTL

被引：10
|
作者：
Liu, Chien-Nan Jimmy [1 ]
Jou, Jing-Yang [1 ]
机构：
[1] Natl Chiao Tung Univ, HsinChu, Taiwan
来源：
IEEE Design and Test of Computers | 2000年 / 17卷 / 03期
关键词：
Algorithms - C (programming language) - Computational complexity - Computer hardware description languages - Cosine transforms - Data flow analysis - Digital arithmetic - Graph theory - Logic circuits - Microcomputers;
D O I：
10.1109/54.867897
中图分类号：
学科分类号：
摘要：
A novel method for extracting finite-state machines (FSMs) in hardware description language (HDL) code written at the register transfer level (RTL) by recognizing the general patterns of FSMs in the process-module (PM) graph is presented. Experimental results on several real designs from different designers with various coding styles demonstrate the effectiveness and efficiency of the method.
引用
收藏
页码：72 / 77
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