HIGH-SPEED DELAYED MULTIPATH TWO-DIMENSIONAL DIGITAL FILTERING ARCHITECTURE.

被引：3

作者：

Kwan, Hon Keung ^{[1
]}

Hirano, Kotaro ^{[1
]}

机构：

[1] Univ of Hong Kong, Hong Kong, Univ of Hong Kong, Hong Kong

来源：

IEEE transactions on circuits and systems | 1987年 / CAS-34卷 / 02期

关键词：

D O I：

10.1109/TCS.1987.1086103

中图分类号：

学科分类号：

摘要：

SIGNAL PROCESSING

引用

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页码：190 / 196

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