共 13 条
- [1] A In-order Queuing Parallel Packet Switch Solution Based on CICQ 2010 INTERNATIONAL COLLOQUIUM ON COMPUTING, COMMUNICATION, CONTROL, AND MANAGEMENT (CCCM2010), VOL IV, 2010, : 98 - 101
- [6] PERFORMANCE ANALYSIS OF AN INPUT AND OUTPUT QUEUING PACKET SWITCH WITH A PRIORITY PACKET DISCARDING SCHEME IEE PROCEEDINGS-COMMUNICATIONS, 1995, 142 (02): : 67 - 74
- [7] Head of the line arbitration of packet switches with combined input and output queueing International journal of digital and analog communication systems, 1991, 4 (03): : 181 - 190
- [8] Speedup requirements for output queuing emulation with a sliding-window parallel packet switch COMPUTATIONAL SCIENCE - ICCS 2006, PT 4, PROCEEDINGS, 2006, 3994 : 49 - 56
- [9] On the Emulation of Finite-Buffered Output Queued Switches Using Combined Input-Output Queuing DISTRIBUTED COMPUTING, PROCEEDINGS, 2008, 5218 : 197 - 211
- [10] CIXOB-κ:: Combined Input-Crosspoint-Output Buffered packet switch GLOBECOM '01: IEEE GLOBAL TELECOMMUNICATIONS CONFERENCE, VOLS 1-6, 2001, : 2654 - 2660