The architecture and anti-jamming test of ultra-fast frequency hop platform

Fast Frequency Hopping (FFH) communications is an important technology of anti-jamming in military applications. In this paper, anti-jamming performance and implementation of Ultra-Fast Frequency Hopping (UFFH) test-bed are described. The test-bed capable of transmitting data at 96 kbps with hopping rates of up to 100 khops/s operates in the VHF/UHF band and keeps capability of communication under the condition in which the 60% of system working spectrum is stained. Based on Software Defined Radio (SDR) technology, the architecture uses a Direct Digital frequency Synthesizer (DDS) to implement demodulation and modulation of Frequency Hopping (FH) signal. Furthermore, different arithmetic of digital signal processing and parameters could be software configured because of the high performance Analog-to-Digital Converter (ADC) and the super-heterodyne architecture. Finally, it is showed by the result of measure and simulation that UFFH test-bed has a robust anti-jamming performance.