High-performance hardware implementation of the 3GPP algorithm KASUMI

被引：1
|
作者：
Zhao, Xue [1 ]
Guo, Shu-Xu [1 ]
机构：
[1] College of Electronic Science and Engineering, Jilin University, Changchun 130012, China
来源：
Journal of China Universities of Posts and Telecommunications | 2006年 / 13卷 / 01期
关键词：
D O I：
10.1016/S1005-8885(07)60082-X
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：60 / 62
相关论文
共 50 条
  • [1] High-Performance Hardware Implementation of the 3GPP Algorithm KASUMI
    ZHAO Xue
    TheJournalofChinaUniversitiesofPostsandTelecommunications, 2006, (01) : 60 - 62
  • [2] Small and high-speed hardware architectures for the 3GPP standard cipher KASUMI
    Satoh, A
    Morioka, S
    INFORMATION SECURITY, PROCEEDINGS, 2002, 2433 : 48 - 62
  • [3] Implementation for EEA3 algorithm Based on 3GPP Standard
    Abdrabou, Mohammed
    Prince, Ahmed
    Hosny, Sameh
    2018 14TH INTERNATIONAL COMPUTER ENGINEERING CONFERENCE (ICENCO), 2018, : 137 - 140
  • [4] High Performance MAC Architecture for 3GPP Modem
    Park, Sejin
    Kim, Yong
    Song, Inchul
    Han, Kichul
    Kim, Jookwang
    Kim, Kyungho
    ADVANCES IN COMPUTER SCIENCE AND INFORMATION TECHNOLOGY, PROCEEDINGS, 2010, 6059 : 228 - 238
  • [5] Implementation of a High Throughput 3GPP Turbo Decoder on GPU
    Michael Wu
    Yang Sun
    Guohui Wang
    Joseph R. Cavallaro
    Journal of Signal Processing Systems, 2011, 65 : 171 - 183
  • [6] Implementation of a High Throughput 3GPP Turbo Decoder on GPU
    Wu, Michael
    Sun, Yang
    Wang, Guohui
    Cavallaro, Joseph R.
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2011, 65 (02): : 171 - 183
  • [7] Implementation of a high-performance genetic algorithm processor for hardware optimization
    Kim, J
    Choi, Y
    Lee, C
    Chung, D
    IEICE TRANSACTIONS ON ELECTRONICS, 2002, E85C (01): : 195 - 203
  • [8] Implementation of a high-performance genetic algorithm processor for hardware optimization
    Kim, Jinjung
    Choi, Yunho
    Lee, Chongho
    Chung, Duckjin
    IEICE Transactions on Electronics, 2002, E85-C (1 SPEC.) : 195 - 203
  • [9] Performance analysis of software implementation of a 3GPP compliant Turbo Decoder
    Beheshti, Babak D.
    2006 IEEE LONG ISLAND SYSTEMS, APPLICATIONS AND TECHNOLOGY CONFERENCE, 2006, : 11 - 14
  • [10] FPGA implementation of a 3GPP turbo codec
    Steensma, J
    Dick, C
    CONFERENCE RECORD OF THE THIRTY-FIFTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS, VOLS 1 AND 2, 2001, : 61 - 65
12345