共 50 条
- [1] Study of Thermal Stress by Numerical Simulation Method on Electronic Package with Power Chip 2013 14TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2013, : 435 - +
- [2] Numerical simulation of creep strain of PBGA solders under thermal cycling EUROSIME 2007: THERMAL, MECHANICAL AND MULTI-PHYSICS SIMULATION AND EXPERIMENTS IN MICRO-ELECTRONICS AND MICRO-SYSTEMS, PROCEEDINGS, 2007, : 411 - +
- [3] Reliability analysis in flip chip package under thermal cycling ADVANCES IN FRACTURE AND FAILURE PREVENTION, PTS 1 AND 2, 2004, 261-263 : 489 - 494
- [5] Thermal-mechanical simulation and analysis on structural caused package induced stress in stacked chip scale package Shanghai Jiaotong Daxue Xuebao, 2007, SUPPL. (139-143): : 139 - 143
- [6] Influence of Compliant Layer Thickness on Stress and Strain of Solder Joints in Wafer Level Chip Scale Package under Thermal Cycle 2014 15TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2014, : 577 - 582
- [7] Numerical simulation of multi-chip Ball Grid Array package under thermal loading Guofang Keji Daxue Xuebao/Journal of National University of Defense Technology, 2010, 32 (05): : 23 - 28
- [8] Effects of Underfill Materials and Thermal Cycling on Mechanical Reliability of Chip Scale Package IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2009, 32 (03): : 633 - 638
- [9] Thermal Cycling Simulation and Sensitivity Analysis of Wafer Level Chip Scale Package with Integration of Metal-Insulator-Metal Capacitors 2019 IEEE 69TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2019, : 1521 - 1528