Design and Implementation of Hardware-in-the-loop Test Architecture for UAV Information Attack Based on QualNet

被引:0
|
作者
Li S. [1 ]
Gong P. [1 ]
Shan D. [1 ,2 ]
Li J. [1 ]
Liu Y. [1 ]
Gao X. [1 ]
机构
[1] School of Mechatronical Engineering, Beijing Institute of Technology, Beijing
[2] School of Electrical and Control Engineering, Shenyang Jianzhu University, Liaoning, Shenyang
来源
Binggong Xuebao/Acta Armamentarii | 2023年 / 44卷 / 09期
关键词
data transmission interface; hardware-in-the-loop test; information attack; UAV;
D O I
10.12382/bgxb.2022.1216
中图分类号
学科分类号
摘要
To meet the requirements of data link interference attack effect simulation in UAV technology research, a hardware-in-the-loop test architecture for UAV information attack is proposed based on QualNet simulation software. The hardware-in-the-loop test architecture simulates the dynamic control, state information display, and jamming attack loading in UAVs. It integrates data transmission interface and various modules including communication network simulation, scenario planning, jamming attack simulation loading, three dimensional situation display, and dynamic control modules. Test results demonstrate that the architecture can effectively simulate the interference attack effects on UAVs. The designed command data interaction interface ensures accurate and real-time communication in the hardware-in-the-loop test for UAV information attacks, laying a foundation for physical equipment access testing. © 2023 China Ordnance Society. All rights reserved.
引用
收藏
页码:2709 / 2721
页数:12
相关论文
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