Second-order Delta-sigma Modulator based on Differential Difference Amplifier without Input Buffer

paper proposes a second-order delta- sigma modulator based on a differential difference amplifier without an input buffer. We introduce a delta-sigma modulator in this study with a structure that eliminates the need for an input buffer, thereby effectively mitigating the area and power consumption issues inherent in existing delta-sigma modulators employing an input buffer. The proposed circuit comprises two integrators for forming a loop filter, a comparator serving as a quantizer, and additional sub-blocks. Fabrication of the proposed circuit is carried out using the TSMC 0.18-mu m RFCMOS process, resulting in an active area of 0.56 mm2. The application of a differential difference amplifier input stage in this paper achieves a high- input impedance, consequently reducing the extra area and power consumption associated with the drawbacks of an input buffer. The signal-to-noise ratio (SNR) of the proposed circuit attains a maximum level of 76 dB, and the effective number of bits (ENOB) is 12.3 bits.