Design of n-bit Full Adder Based on Quantum-Dot Cellular Automata

被引:0
|
作者
Zhang H. [1 ]
Xie G.-J. [1 ]
Zhang Y.-Q. [1 ]
机构
[1] School of Microelectronics, Hefei University of Technology, Anhui, Hefei
来源
关键词
clock latency; full adder; quantum-dot cellular automata; three input majority gate; three input XOR gate;
D O I
10.12263/DZXB.20220324
中图分类号
学科分类号
摘要
Quantum-dot cellular automata (QCA) is considered as an emerging technology, because of its unique characteristics such as low power consumption, nanoscale design, and high computing speed, which can be used as an alternative for CMOS technology in circuit design for quantum computers in the near future. In recent years, many FAs (Full Adder) are designed using three-input majority gate (M3) and three-input XOR gate (XOR3) in QCA circuits. Three new types of n-bit full adders (FA1, FA2 and FA3) are designed based on these two logic gates and the unique clock characteristics of QCA circuits in this paper. FA1 is implemented using only a 1-bit FA, and its cell number and circuit area are reduced by at least 78% and 90% by comparing with the published 8-bit FA. But FA1 can only calculate one bit in one clock cycle, so it has a large delay. The number of cells and circuit area of FA2 are reduced by at least 47% and 63% by comparing with the published 8-bit full adder. And FA2 can calculate two bits in one clock cycle. FA3 can perform four-bit calculations in one clock cycle with minimum delay. As n-bit full adders, the number of cells and circuit area of FA1, FA2 and FA3 will not change with the increase of the number n, which can’t be realized by the previous design. © 2024 Chinese Institute of Electronics. All rights reserved.
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页码:626 / 632
页数:6
相关论文
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