Energy Efficient FIR Filter Design Using Distributed Arithmetic

被引:0
|
作者
Ganjikunta G.K. [1 ]
Mohammed M.B. [1 ]
Sibghatullah I.K. [1 ]
机构
[1] Department of Electronics and Communication Engineering, Sreenidhi Institute of Science and Technology, Telangana, Hyderabad
关键词
A; biomedical signal processing; distributed arithmetic (DA); dynamic voltage and frequency scaling; serial finite impulse response (FIR) filter; TN; 713;
D O I
10.1007/s12204-022-2490-x
中图分类号
学科分类号
摘要
This paper presents a distributed arithmetic (DA) architecture that can efficiently implement finite impulse response (FIR) filters for biomedical signal processor applications. FIR filter design is more efficient when it uses a look-up table (LUT)-based technique rather than a serial one. The design’s performance and efficiency can be improved by using segmented memory banks as well as memory lookup for multiply operation. Verilog HDL is used to model the proposed design, and Synopsys Design Compiler tool is used for synthesis. The FIR filter architecture utilizing DA results in a 24.82% reduction in total power compared with the serial FIR structure. © 2022, Shanghai Jiao Tong University.
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页码:1023 / 1027
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