Instruction combining for coalescing memory accesses using global code motion

被引：0
|
作者：
Kawahito, Motohiro [1 ]
Komatsu, Hideaki [1 ]
Nakatani, Toshio [1 ]
机构：
[1] IBM Tokyo Research Laboratory, 1623-14, Shimotsuruma, Yamato, Kanagawa, 242-8502, Japan
来源：
Proc. ACM SIGPLAN Workshop Mem. Syst. Perform., MSP | 1600年 / 2-11期
关键词：
Compendex;
D O I：
2nd ACM SIGPLAN Workshop on Memory Systems Performance, MSP 2004
中图分类号：
学科分类号：
摘要：
Program compilers - Cache memory - Digital arithmetic - Integer programming - Java programming language - Just in time production - Memory architecture - Flocculation
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