Evolutionary algorithm for logic circuit synthesis with memristor-based implication gate

被引:0
|
作者
Wang X. [1 ,2 ]
Jiao L. [1 ]
Li Y. [1 ]
机构
[1] School of Electrical Engineering, Xidian University, Xi'an
[2] School of Computer Science, Xi'an Shiyou University, Xi'an
关键词
Evolutionary algorithm; Logic circuit synthesis; Material implication; Memristor; Remainder function;
D O I
10.13245/j.hust.161014
中图分类号
学科分类号
摘要
An evolutionary algorithm for logic synthesis with memristor-based implication gates (IMP_ELS) was proposed to minimize the number of pulses under a given number of working memristors. The problem was modeled as a minimization problem with constant constraint. When the constraint violation was decreased to certain degree, one of AND, OR and EXOR remainder functions was obtained through comparing the truth table of the best solution by far and the truth table of the given function.The new evolution process was started to synthesis the obtained remainder function. The multistage evolution could ensure obtaining the feasible solution. A new initialization method was developed to encode the circuit to reduce redundant and illegal gates in initial population.The results on 2~11 bit benchmarks show that the algorithm can decrease pulse numbers by 28% on 82% benchmarks if the number of working memristors is increased from 2 to 3. © 2016, Editorial Board of Journal of Huazhong University of Science and Technology. All right reserved.
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页码:70 / 76
页数:6
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