A genetic algorithm for scheduling of data-parallel tasks on multicore architectures

被引：0
|
作者：
Liu Y. [1 ]
Meng L. [1 ]
Tomiyama H. [1 ]
机构：
[1] Graduate School of Science and Engineering, Ritsumeikan University, Shiga, Kusatsu
来源：
IPSJ Transactions on System LSI Design Methodology | 2019年 / 12卷
关键词：
Data parallelism; Genetic algorithm; Multicore architecture; Task parallelism; Task scheduling;
D O I：
10.2197/IPSJTSLDM.12.74
中图分类号：
学科分类号：
摘要：
This paper proposes a genetic algorithm for scheduling of multiple data-parallel tasks on multicores. Unlike traditional task scheduling, this work allows individual tasks to run on multiple cores in a data-parallel fashion. Experimental results show the effectiveness of the proposed algorithm over state-of-the-art algorithms. © 2019 Information Processing Society of Japan
引用
收藏
相关论文
共 50 条
  • [1] Communication-aware scheduling of data-parallel tasks on multicore architectures
    Shimada, Kana
    Taniguchi, Ittetsu
    Tomiyama, Hiroyuki
    [J]. IPSJ Transactions on System LSI Design Methodology, 2019, 12 : 65 - 73
  • [2] Decentralized Scheduling for Data-Parallel Tasks in the Cloud
    Li, Ziyang
    Li, Dongsheng
    Chen, Yingwen
    Chen, Kai
    Zhang, Yiming
    [J]. ACM TRANSACTIONS ON PARALLEL COMPUTING, 2024, 11 (02)
  • [3] A Distributed Hardware Algorithm for Scheduling Dependent Tasks on Multicore Architectures
    Di Gregorio, Lorenzo
    [J]. PROCEEDINGS OF THE SEVENTH INTERNATIONAL WORKSHOP ON INTELLIGENT SOLUTIONS IN EMBEDDED SYSTEMS, 2009, : 87 - 94
  • [4] A branch-and-bound approach to scheduling of data-parallel tasks on multi-core architectures
    Liu, Yang
    Meng, Lin
    Taniguchi, Ittetsu
    Tomiyama, Hiroyuki
    [J]. INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS, 2020, 12 (01) : 125 - 135
  • [5] Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures
    Vikram, Krishna N.
    Vasudevan, Vinita
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2006, 14 (09) : 1010 - 1023
  • [6] Universal mechanisms for data-parallel architectures
    Sankaralingam, K
    Keckler, SW
    Mark, WR
    Burger, D
    [J]. 36TH INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, PROCEEDINGS, 2003, : 303 - 314
  • [7] Convergence and Scalarization for Data-Parallel Architectures
    Lee, Yunsup
    Krashinsky, Ronny
    Grover, Vinod
    Keckler, Stephen W.
    Asanovic, Krste
    [J]. PROCEEDINGS OF THE 2013 IEEE/ACM INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION (CGO), 2013, : 182 - 192
  • [8] Message Passing on Data-Parallel Architectures
    Stuart, Jeff A.
    Owens, John D.
    [J]. 2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING, VOLS 1-5, 2009, : 918 - +
  • [9] A genetic algorithm for tasks scheduling in parallel multiprocessor systems
    Zhong, YW
    Yang, JG
    [J]. 2003 INTERNATIONAL CONFERENCE ON MACHINE LEARNING AND CYBERNETICS, VOLS 1-5, PROCEEDINGS, 2003, : 1785 - 1790
  • [10] Work-in-Progress: Communication-Aware Scheduling of Data-Parallel Tasks
    Shimada, Kana
    Taniguchi, Ittetsu
    Tomiyama, Hiroyuki
    [J]. 2018 INTERNATIONAL CONFERENCE ON COMPILERS, ARCHITECTURES AND SYNTHESIS FOR EMBEDDED SYSTEMS (CASES), 2018,
12345