Interface trap density evaluation on bare silicon-on-insulator wafers using the quasi-static capacitance technique

被引：0

作者：

机构：

[1] Pirro, L.

[2] Ionica, I.

[3] Ghibaudo, G.

[4] Mescot, X.

[5] Faraone, L.

[6] Cristoloveanu, S.

来源：

| 1600年 / American Institute of Physics Inc.卷 / 119期

关键词：

This paper presents a detailed investigation of the quasi-static capacitance-voltage (QSCV) technique in pseudo-metal-oxide-semiconductor field effect transistor (pseudo-MOSFET) configuration for evaluating the interface quality of bare silicon-on-insulator (SOI) wafers; without processing dedicated metal-oxide-semiconductor (MOS) test devices. A physical model is developed that is capable of explaining the experimental results. In addition; frequency effects are used to validate the equations by a systematic comparison between experimental and calculated characteristics; as well as by a direct comparison with the standard high-low frequency approach. An extraction procedure for interface trap density based solely on QSCV experimental results is proposed; and limits of the procedure are discussed. The proposed experimental and analytical procedure is demonstrated by characterizing SOI structures with different geometries and with different qualities of surface passivation of the top silicon film. © 2016 Author(s);

D O I：

暂无

中图分类号：

学科分类号：

摘要：

Journal article (JA)

引用

共 20 条

[1] Interface trap density evaluation on bare silicon-on-insulator wafers using the quasi-static capacitance technique
Pirro, L.
Ionica, I.
Ghibaudo, G.
Mescot, X.
Faraone, L.
Cristoloveanu, S.
JOURNAL OF APPLIED PHYSICS, 2016, 119 (17)
[2] Correlation between photoluminescence lifetime and interface trap density in silicon-on-insulator wafers
Tajima, M
Yoshida, H
Ibuka, S
Kishino, S
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 2003, 42 (4B): : L429 - L431
[3] Correlation between photoluminescence lifetime and interface trap density in silicon-on-insulator wafers
Tajima, Michio
Yoshida, Haruhiko
Ibuka, Shigeo
Kishino, Seigo
Tajima, M. (tajima@pub.isas.ac.jp), 1600, Japan Society of Applied Physics (42):
[4] Determination of the trap density in amorphous silicon by quasi-static capacitance-voltage measurements
Fahrner, WR
Loffler, S
Chan, Y
Kwong, S
Man, K
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1998, 145 (05) : 1786 - 1790
[5] In-depth profiling of electron trap states in silicon-on-insulator layers and local mechanical stress near the silicon-on-insulator/buried oxide interface in separation-by-implanted-oxygen wafers
Nakajima, Yoshikata
Toda, Takahiro
Hanajiri, Tatsuro
Toyabe, Toru
Sugano, Takuo
JOURNAL OF APPLIED PHYSICS, 2010, 108 (12)
[6] Exact extraction method of trap densities at insulator interfaces using quasi-static capacitance-voltage characteristics and numerical solutions of physical equations
Kimura, Mutsumi
Kojiri, Takashi
Tanabe, Akihiro
Kato, Takeyoshi
SOLID-STATE ELECTRONICS, 2012, 69 : 38 - 42
[7] Trap density imaging of silicon wafers using a lock-in infrared camera technique
Pohl, Peter
Schmidt, Jan
Bothe, Karsten
Brendel, Rolf
CONFERENCE RECORD OF THE 2006 IEEE 4TH WORLD CONFERENCE ON PHOTOVOLTAIC ENERGY CONVERSION, VOLS 1 AND 2, 2006, : 932 - 935
[8] Improvements in the quasi-static capacitance-voltage characterization of semiconductor-insulator interface states (Si/SiO2)
Gulyaev I.B.
Zhdan A.G.
Kukharskaya N.F.
Tikhonov R.D.
Chucheva G.V.
Russian Microelectronics, 2004, 33 (4) : 224 - 235
[9] Nondestructive evaluation of interfaces in bonded silicon-on-insulator structures using the picosecond ultrasonics technique
Hao, HY
Maris, HJ
Sadana, DK
ELECTROCHEMICAL AND SOLID STATE LETTERS, 1998, 1 (01) : 54 - 55
[10] Nondestructive evaluation of interfaces in bonded silicon-on-insulator structures using the picosecond ultrasonics technique
Brown Univ, Providence, United States
Electrochem Solid State Letters, 1 (54-55):

← 1 2 →