共 50 条
- [1] Asynchronous implementation of modular exponentiation for RSA cryptography PROCEEDINGS OF THE SECOND IEEE ASIA PACIFIC CONFERENCE ON ASICS, 2000, : 191 - 194
- [2] Parallel modular multiplication with application to VLSI RSA implementation Proceedings - IEEE International Symposium on Circuits and Systems, 1999, 1
- [3] Parallel modular multiplication with application to VLSI RSA implementation ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 490 - 495
- [4] Design and implementation of reconfigurable RSA cryptosystem 2007 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS, 2007, : 252 - +
- [5] Implementation of 1024-bit modular processor for RSA cryptosystem PROCEEDINGS OF THE SECOND IEEE ASIA PACIFIC CONFERENCE ON ASICS, 2000, : 187 - 190
- [6] A DPA attack against the modular reduction within a CRT implementation of RSA CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2002, 2002, 2523 : 228 - 243
- [7] FPGA Implementation of RSA based on Carry Save Montgomery Modular Multiplication 2016 INTERNATIONAL CONFERENCE ON COMPUTATIONAL TECHNIQUES IN INFORMATION AND COMMUNICATION TECHNOLOGIES (ICCTICT), 2016,
- [9] Shift-Sub Modular Multiplication Algorithm and Hardware Implementation for RSA Cryptography HYBRID INTELLIGENT SYSTEMS, HIS 2021, 2022, 420 : 541 - 552
- [10] Design and Implementation of two Improved Batch RSA Algorithms ICCSIT 2010 - 3RD IEEE INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND INFORMATION TECHNOLOGY, VOL 4, 2010, : 156 - 160