共 50 条
- [2] Automated Parallel Test Forms Assembly using Zero-suppressed Binary Decision Diagrams [J]. IEEE ACCESS, 2023, 11 : 112804 - 112813
- [3] Chain Reduction for Binary and Zero-Suppressed Decision Diagrams [J]. Journal of Automated Reasoning, 2020, 64 : 1361 - 1391
- [4] Chain Reduction for Binary and Zero-Suppressed Decision Diagrams [J]. TOOLS AND ALGORITHMS FOR THE CONSTRUCTION AND ANALYSIS OF SYSTEMS, TACAS 2018, PT I, 2018, 10805 : 81 - 98
- [5] CGRA Mapping Using Zero-Suppressed Binary Decision Diagrams [J]. 27TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, ASP-DAC 2022, 2022, : 616 - 622
- [6] Designing Survivable Networks with Zero-Suppressed Binary Decision Diagrams [J]. WALCOM: ALGORITHMS AND COMPUTATION (WALCOM 2020), 2020, 12049 : 273 - 285
- [7] Applications of zero-suppressed decision diagrams [J]. Synthesis Lectures on Digital Circuits and Systems, 2015, 9 (02): : 1 - 125
- [8] Zero-Suppressed Sentential Decision Diagrams [J]. THIRTIETH AAAI CONFERENCE ON ARTIFICIAL INTELLIGENCE, 2016, : 1058 - 1066
- [9] Introduction to zero-suppressed decision diagrams [J]. Synthesis Lectures on Digital Circuits and Systems, 2014, 45 : 1 - 33
- [10] Compressing Exact Cover Problems with Zero-suppressed Binary Decision Diagrams [J]. PROCEEDINGS OF THE THIRTIETH INTERNATIONAL JOINT CONFERENCE ON ARTIFICIAL INTELLIGENCE, IJCAI 2021, 2021, : 1996 - 2004