A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver with Hybrid AFE Capable of Supporting Long Reach Channels

被引：23

作者：

Khairi A. ^{[1
]}

Krupnik Y. ^{[1
]}

Laufer A. ^{[1
]}

Segal Y. ^{[1
]}

Cusmai M. ^{[1
]}

Levin I. ^{[1
]}

Gordon A. ^{[1
]}

Sabag Y. ^{[1
]}

Rahinski V. ^{[1
]}

Lotan I. ^{[1
]}

Ori G. ^{[1
]}

Familia N. ^{[1
]}

Litski S. ^{[1
]}

Grafi T.W. ^{[1
]}

Virobnik U. ^{[1
]}

Lazar D. ^{[2
]}

Horwitz Y. ^{[1
]}

Balankutty A. ^{[3
]}

Kiran S. ^{[3
]}

Palermo S. ^{[4
]}

Li P.M. ^{[5
]}

O'Mahony F. ^{[3
]}

Cohen A. ^{[1
]}

机构：

[1] Mixed-Signal IP Group, Intel Corporation, Jerusalem

[2] Mixed-Signal IP Group, Intel Corporation, Haifa

[3] Advance Design Group, Intel Corporation, Hillsboro, 97124, OR

[4] Department of Electrical and Computer Engineering, Texas A&M University, College Station, 77843, TX

[5] Intel Corporation, San Jose, 95134, CA

来源：

IEEE Journal of Solid-State Circuits | 2023年 / 58卷 / 01期

关键词：

224; Gb/s; digital decision-feedback equalizer (DFE); digital feed-forward equalizer (FFE); pulse amplitude modulation 4-level (PAM4); SerDes; successive approximation register (SAR); time interleaved ADC;

D O I：

10.1109/JSSC.2022.3211475

中图分类号：

学科分类号：

摘要：

A 224-Gb/s pulse amplitude modulation 4-level (PAM4) ADC-based SerDes receiver (RX) is implemented in a 5-nm FinFET process. The RX consists of a low-noise hybrid analog front-end (AFE) that incorporates both inductive peaking and source degeneration, a 64-way time-interleaved ADC, digital equalization consisting of an up to 30 tap feed-forward equalizer (FFE), optional decision-feedback equalizer (DFE), and a clock-data-recovery (CDR) loop utilizing a 14-GHz digitally controlled oscillator (DCO). The RX was characterized for medium-to-long reach channels (20.6-, 27-, 31.4-, and 38-dB insertion loss at Nyquist) with a corresponding pre-forward error correction (FEC) bit error rates of 1.9E-11, 5.2E-10, 1.2E-8, and 6E-7, respectively. The analog power consumption of the RX is 1.41 pJ/b. © 2022 IEEE.

引用

页码：8 / 18

页数：10

共 5 条

[1] 112-Gb/s PAM4 ADC-Based SERDES Receiver With Resonant AFE for Long-Reach Channels
Krupnik, Yoel
Perelman, Yevgeny
Levin, Itamar
Sanhedrai, Yosi
Eitan, Roee
Khairi, Ahmad
Shifman, Yizhak
Landau, Yoni
Virobnik, Udi
Dolev, Noam
Meisler, Alon
Cohen, Ariel
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55 (04) : 1077 - 1085
[2] 112 Gb/s PAM4 ADC Based SERDES Receiver for Long-Reach Channels in 10nm Process
Krupnik, Yoel
Perelman, Yevgeny
Levin, Itamar
Sanhedrai, Yosi
Eitan, Rocc
Khairi, Ahmad
Landau, Yoni
Virobnik, Udi
Doley, Noam
Meisler, Alon
Cohen, Ariel
2019 SYMPOSIUM ON VLSI CIRCUITS, 2019, : C266 - C267
[3] A 0.92-pJ/b PAM-4 and 0.61-pJ/b PAM-6 224-Gb/s DAC-Based Transmitter in 3-nm FinFET
Cusmai, Marco
Familia, Noam
Kuperberg, Elad
Nashash, Mohammad
Gottesman, Dovid
Marcus, Zvi
Horwitz, Yeshayahu
Zalcman, Sagi
Kim, Jihwan
Kundu, Sandipan
Radashkevich, Ilia
Segal, Yoav
Lazar, Dror
Virobnik, Udi
Li, Peng
Cohen, Ariel
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2025, 60 (01) : 23 - 34
[4] A 4.8pJ/b 6Gb/s ADC-Based PAM-4 Wireline Receiver Data -Path with Cyclic Prefix in 14nm FinFET
Kim, Gain
Kull, Lukas
Luu, Danny
Braendli, Matthias
Menolfi, Christian
Francese, Pier-Andrea
Yueksel, Hazar
Aprile, Cosimo
Morf, Thomas
Kossel, Marcel
Cevrero, Alessandro
Ozkaya, Ilter
Bae, Hyeon-Min
Burg, Andreas
Toifl, Thomas
Leblebici, Yusuf
2019 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 2019, : 239 - 240
[5] A 3.6 pJ/b 56 Gb/s 4-PAM Receiver With 6-Bit TI-SAR ADC and Quarter-Rate Speculative 2-Tap DFE in 32 nm CMOS
Yueksel, Hazar
Kull, Lukas
Burg, Andreas
Braendli, Matthias
Buchmann, Peter
Francese, Pier Andrea
Menolfi, Christian
Kossel, Marcel
Morf, Thomas
Andersen, Toke M.
Luu, Danny
Toifl, Thomas
ESSCIRC CONFERENCE 2015 - 41ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC), 2015, : 148 - 151

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