Memory and Compute-in-Memory Based on Ferroelectric Field Effect Transistors

被引:0
|
作者
Liu Y. [1 ]
Li T. [2 ]
Zhu X. [1 ]
Yang H. [2 ]
Li X. [2 ]
机构
[1] Xinsheng Technology Co., Ltd., Beijing
[2] Department of Electronic Engineering, BNRist, Tsinghua University, Beijing
基金
中国国家自然科学基金;
关键词
Compute-in-Memory (CiM); Ferroelectric device; Ferroelectric Field Effect Transistors (FeFETs); Memory; Nonvolatile Memory (NVM);
D O I
10.11999/JEIT230370
中图分类号
学科分类号
摘要
Recently, with the development of the Internet of Things and Artificial Intelligence, higher energy efficiency, density, and performance in on-chip memories and intelligent computing are required. Facing the energy efficiency and density bottleneck in conventional CMOS memories and the “memory wall” problem in the Von Neumann architecture, emerging Nonvolatile Memories (NVMs) such as Ferroelectric Field Effect Transistors (FeFETs) bring new opportunities to solve the challenges. FeFETs have the characteristics of non-volatility, ultra-low power, and high on-off ratio, which are very suitable for memories and Compute-in-Memory (CiM) in high-density, low-power scenarios and would support the implementation of data-intensive applications at the edge. This paper first reviews the development, structure, characteristics, and modeling of FeFETs. Then, the exploration and optimization of FeFET-based memories with different circuit structures and characteristics are discussed. Further, this paper summarizes the FeFET-based CiM circuits, including nonvolatile computing, logic-in-memory, matrix-vector multiplication, and content-addressable memories. Finally, the prospects and challenges of FeFET-based memory and CiM are analyzed. © 2023 Science Press. All rights reserved.
引用
收藏
页码:3083 / 3097
页数:14
相关论文
共 78 条
  • [1] SALAHUDDIN S, NI Kai, DATTA S., The era of hyper-scaling in electronics[J], Nature Electronics, 1, 8, pp. 442-450, (2018)
  • [2] REUTHER A, MICHALEAS P, JONES M, Et al., AI accelerator survey and trends[C], 2021 IEEE High Performance Extreme Computing Conference (HPEC), pp. 1-9, (2021)
  • [3] LI Xueqing, LAI Longqiang, Nonvolatile memory and computing using emerging ferroelectric transistors[C], 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 750-755, (2018)
  • [4] CHANG C H, CHANG V S, PAN K H, Et al., Critical process features enabling aggressive contacted gate pitch scaling for 3nm CMOS technology and beyond[C], 2022 International Electron Devices Meeting, (2022)
  • [5] REHMAN M M, REHMAN H M M U, GUL J Z, Et al., Decade of 2D-materials-based RRAM devices: A review[J], Science and Technology of Advanced Materials, 21, 1, pp. 147-186, (2020)
  • [6] CHEN Zixuan, WU Huaqiang, GAO Bin, Et al., Performance improvements by SL-current limiter and novel programming methods on 16MB RRAM chip[C], 2017 IEEE International Memory Workshop (IMW), pp. 1-4, (2017)
  • [7] IKEGAWA S, NAGEL K, MANCOFF F B, Et al., High-speed (400MB/s) and low-BER STT-MRAM technology for industrial applications, 2022 International Electron Devices Meeting, (2022)
  • [8] LEE T Y, LEE J M, KIM M K, Et al., World-most energy-efficient MRAM technology for non-volatile RAM applications[C], 2022 International Electron Devices Meeting, (2022)
  • [9] MIN D, PARK J, WEBER O, Et al., 18nm FDSOI technology platform embedding PCM & innovative continuous-active construct enhancing performance for leading-edge MCU applications[C], 2021 IEEE International Electron Devices Meeting, (2021)
  • [10] XIAO Yi, XU Yixin, JIANG Zhouhang, Et al., On the write schemes and efficiency of FeFET 1T NOR array for embedded nonvolatile memory and beyond[C], 2022 International Electron Devices Meeting, (2022)