Multi-subband Ensemble Monte Carlo Simulation of InGaAs Schottky Barrier MOSFETs

被引：0
|
作者：
Li J. [1 ]
Du G. [1 ]
Liu L. [1 ]
Liu X. [1 ]
机构：
[1] Institute of Microelectronics, Peking University, Beijing
来源：
Beijing Daxue Xuebao (Ziran Kexue Ban)/Acta Scientiarum Naturalium Universitatis Pekinensis | 2020年 / 56卷 / 06期
关键词：
Ensemble Monte Carlo; InGaAs; Schottky barrier MOSFET;
D O I：
10.13209/j.0479-8023.2020.106
中图分类号：
学科分类号：
摘要：
With the help of a multi-subband, multi-valley ensemble Monte Carlo simulator, which takes into account of multiple scattering mechanisms present in nano-scale MOSFET channel's two-dimensional electron gas, InGaAs Schottky barrier MOSFET is simulated. The results show that under steady state, although scattering alters its carrier density, velocity and electric potential distribution, Schottky barrier MOSFET's output and transfer characteristic is merely impacted by scattering. When a step voltage is applied to the device's drain contact, scattering increases the device's peak over-shoot current and transition time. Besides, scattering also reduces the cut-off frequency, especially for short channel device. © 2020 Peking University.
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页码：996 / 1004
页数：8
相关论文
共 23 条
  • [1] Bashir F, Alharbi A G, Loan S A., Electrostatically doped DSL Schottky barrier MOSFET on SOI for low power applications, IEEE Journal of the Electron Devices Society, 6, pp. 19-25, (2017)
  • [2] Kumar P, Bhowmick B., Scaling of dopant segrega-tion Schottky barrier using metal strip buried oxide MOSFET and its comparison with conventional de-vice, Silicon, 10, 3, pp. 811-820, (2018)
  • [3] Prakash A, Ilatikhameneh H, Wu P, Et al., Under-standing contact gating in Schottky barrier transistors from 2D channels, Scientific Reports, 7, 1, (2017)
  • [4] del Alamo J A, Antoniadis D A, Lin J, Et al., III- V MOSFETs for future CMOS, 2015 IEEE Com-pound Semiconductor Integrated Circuit Symposium (CSICS), pp. 1-4, (2015)
  • [5] Svensson J, Dey A W, Jacobsson D, Et al., III-V nanowire complementary metal-oxide semiconductor transistors monolithically integrated on Si, Nano Letters, 15, 12, pp. 7898-7904, (2015)
  • [6] Schmid H, Cutaia D, Gooth J, Et al., Monolithic integration of multiple III-V semiconductors on Si for MOSFETs and TFETs, 2016 IEEE International Electron Devices Meeting (IEDM), pp. 3-6, (2016)
  • [7] Chelliah C R J, Swaminathan R., Current trends in changing the channel in MOSFETs by III-V semicon-ducting nanostructures, Nanotechnology Reviews, 6, 6, pp. 613-623, (2017)
  • [8] Zhao X, Heidelberger C, Fitzgerald E A, Et al., Sub-10-nm-diameter InGaAs vertical nanowire MOSFETs: Ni Versus Mo contacts, IEEE Transactions on Elec-tron Devices, 65, 9, pp. 3762-3768, (2018)
  • [9] Schwarz M, Calvet L E, Snyder J P, Et al., On the physical behavior of cryogenic IV and III-V Schottky barrier MOSFET devices, IEEE Transactions on Electron Devices, 64, 9, pp. 3808-3815, (2017)
  • [10] Ahangari Z., Impact of indium mole fraction on the quantum transport of ultra-scaled In<sub>x</sub>Ga<sub>1-x</sub>As double-gate Schottky MOSFET: tight-binding approach, Ap-plied Physics A, 122, 2, (2016)
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