Mixed-mode SNN crossbar array with embedded dummy switch and mid-node pre-charge scheme

被引：0

作者：

Oh, Kwang-Il ^{[1
]}

Kim, Hyuk ^{[1
]}

Kang, Taewook ^{[1
]}

Kim, Sung-Eun ^{[1
]}

Lee, Jae-Jin ^{[1
]}

Yang, Byung-Do ^{[2
]}

机构：

[1] Elect & Telecommun Res Inst, AI SoC Res Div, Daejeon, South Korea

[2] Chungbuk Natl Univ, Dept Elect Engn, Cheongju, South Korea

来源：

ETRI JOURNAL | 2024年 / 46卷 / 05期

关键词：

charge sharing; crossbar array; digital-to-analog converter; mixed mode; neuromorphic system; spiking neural network; synapse;

D O I：

10.4218/etrij.2024-0120

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a membrane computation error-minimized mixed-mode spiking neural network (SNN) crossbar array. Our approach involves implementing an embedded dummy switch scheme and a mid-node pre-charge scheme to construct a high-precision current-mode synapse. We effectively suppressed charge sharing between membrane capacitors and the parasitic capacitance of synapses that results in membrane computation error. A 400 x 20 SNN crossbar prototype chip is fabricated via a 28-nm FDSOI CMOS process, and 20 MNIST patterns with their sizes reduced to 20 x 20 pixels are successfully recognized under 411 mu W of power consumed. Moreover, the peak-to-peak deviation of the normalized output spike count measured from the 21 fabricated SNN prototype chips is within 16.5% from the ideal value, including sample-wise random variations.

引用

页码：865 / 877

页数：13