Introduction of Digital System-In-Package building block for space applications

This work presents a comprehensive investigation into the design, manufacturing, and testing of a complex System-in-Package (SIP) intended for space applications. The SIP consists of multiple dies (x6) with bump counts (>2000) and pitches (200 mu m), necessitating careful consideration of substrate stack-up configurations and electrical behavior. Through simulations and experimental testing, various stack-up configurations were evaluated to achieve desired parameters, including a data velocity of 25GHz @ -30dB. As SiP with organic substrate technology is not introduced in the space market, test flow procedures were defined, combining ECSS, IPC and MIL standards with tailored groups to validate SIP technology, and coupons were designed for thorough testing. Manufacturing and inspection processes were conducted to ensure substrate quality and dimensional accuracy. Furthermore, chip assembly tests were performed to assess the warpage behavior of the substrate to identify the most appropriate packaging solution. Overall, this study provides valuable insights into the development and qualification of complex SIPs for space applications, highlighting the importance of thorough testing and continuous improvement in ensuring reliability and performance in harsh environments.