A High-Speed Asynchronous Data I/O Method for HEPS

被引:0
|
作者
Fu, Shiyuan [1 ]
Wang, Lu [2 ]
Cheng, Yaodong [1 ,3 ,4 ]
Hu, Yu [1 ]
Liu, Rui [1 ]
Wang, Lei [1 ]
Wang, Shuang [1 ]
Liu, Jianli [1 ]
Sun, Haokai [1 ]
Qi, Fazhi [1 ]
机构
[1] Chinese Acad Sci, Inst High Energy Phys, Beijing 100049, Peoples R China
[2] Chinese Acad Sci, Natl Sci Lib, Beijing 100190, Peoples R China
[3] Univ Chinese Acad Sci, Beijing 100049, Peoples R China
[4] TIANFU Cosm Ray Res Ctr, Chengdu 610041, Sichuan, Peoples R China
关键词
D O I
10.1051/epjconf/202429502001
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
The High Energy Photon Source (HEPS) is expected to produce a substantial volume of data, lead to immense data I/O pressure during computing. Inefficient data I /O can significantly impact computing performance. To address this challenge, firstly, we have developed a data I/O framework for HEPS. This framework consists of three layers: data channel layer, distributed memory management layer, and I/O interface layer. It mask the underlying data di fferences in formats and sources, while implementing efficient I/O methods. Additionally, it supports both stream computing and batch computing. Secondly, we have designed a data processing pipeline scheme aimed at reducing I/O latency and optimizing I/O bandwidth utilization during the processing of high-throughput data. This involves breaking down the computing task into several stages, including data loading, data pre-processing, data processing, and data writing, which are executed asynchronously and in parallel. Finally, we introduce the design of stream data I/O process. The primary objective of stream data I/O is to enable real-time online processing of raw data, avoiding I/O bottlenecks caused by disk storage. This approach ensures the stability of data transmission and integrates distributed memory management to guarantee data integrity in memory.
引用
收藏
页数:6
相关论文
共 50 条
  • [1] High-speed asynchronous data multiplexing/demultiplexing
    Kirichenko, AF
    IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 1999, 9 (02) : 4046 - 4048
  • [2] A new I/O interface architecture for high-speed data communication
    Gan, Q
    Ammar, R
    Abdallah, M
    IEEE INTERNATIONAL SYMPOSIUM ON COMPUTERS AND COMMUNICATIONS, PROCEEDINGS, 1999, : 216 - 225
  • [3] Hierarchical I/O memory system for high-speed data communication
    Gan, Q
    Ammar, RA
    Abdalla, M
    INTERNATIONAL SOCIETY FOR COMPUTERS AND THEIR APPLICATIONS 10TH INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS, 1997, : 9 - 15
  • [4] Designing high-speed asynchronous pipelines
    Perri, S
    Corsonello, P
    Cocorullo, G
    PROCEEDINGS OF THE 26TH EUROMICRO CONFERENCE, VOLS I AND II, 2000, : 394 - 399
  • [5] ASYNCHRONOUS HIGH-SPEED DIGITAL MULTIPLEXING
    FLEURY, B
    IEEE COMMUNICATIONS MAGAZINE, 1986, 24 (08) : 17 - 25
  • [6] An asynchronous high-speed synchrotron shutter
    Chua, Charlene S.
    Higgins, Simon P. A.
    Fouras, Andreas
    JOURNAL OF SYNCHROTRON RADIATION, 2010, 17 : 624 - 630
  • [7] High-speed QDI asynchronous pipelines
    Ozdag, RO
    Beerel, PA
    ASYNC: EIGHTH INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS, PROCEEDINGS, 2002, : 13 - 22
  • [8] A HIGH-SPEED ASYNCHRONOUS DIGITAL MULTIPLIER
    NOAKS, DR
    BURTON, DP
    RADIO AND ELECTRONIC ENGINEER, 1968, 36 (06): : 357 - &
  • [9] Enabling high-speed asynchronous data extraction and transfer using DART
    Docan, Ciprian
    Parashar, Manish
    Klasky, Scott
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2010, 22 (09): : 1181 - 1204
  • [10] HIGH-SPEED CMOS I/O BUFFER CIRCUITS
    ISHIBE, M
    OTAKA, S
    TAKEDA, J
    TANAKA, S
    TOYOSHIMA, Y
    TAKATSUKA, S
    SHIMIZU, S
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (04) : 671 - 673