Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications

被引：0
|
作者：
Shavit, Netanel [1 ]
Stanger, Inbal [1 ]
Taco, Ramiro [2 ]
Yavits, Leonid [1 ]
Fish, Alexander [1 ]
机构：
[1] Bar Ilan Univ, Ramat Gan, Israel
[2] Univ Calabria UNICAL, Arcavacata Di Rende, Italy
来源：
2024 19TH CONFERENCE ON PH.D RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PRIME 2024 | 2024年
关键词：
IoT; logic gates; Dual Mode Logic (DML); Dynamic Leakage-Suppression (DLS) logic; Leakage Suppression Mode (LSM); Dual Mode Standard Cell (DMSC); Triple Mode Logic (TML); low power; HIGH-SPEED; CIRCUITS;
D O I：
10.1109/PRIME61930.2024.10559729
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
IoT devices often face conflicting power and performance requirements. They might be required to dynamically switch between (1) power-saving battery-powered mode, (2) ultra-low harvested power mode, and (3) high-performance real-time operation. In this work, we present a novel Triple Mode Logic (TML) that addresses the aforementioned requirements and enables ultra-low power mode for purely harvested operation, energy-saving mode for battery-powered operation, and accelerated mode for high-performance operation. Simulation results of several TML benchmarks indicate that in ultra-low power mode, TML reduces the power consumption by approximately five orders of magnitude compared to CMOS. In normal static (energy-saving) mode, TML consumes up to 35% less energy than Dual Mode Standard Cell (DMSC) state-of-the-art solution. In normal dynamic (high-performance) mode, TML is faster than the DMSC solution by up to 43%.
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页数：4
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