共 50 条
- [1] Combining dual-supply, dual-threshold and transistor sizing for power reduction [J]. ICCD'2002: IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 2002, : 316 - 321
- [7] Level conversion for dual-supply systems [J]. ISLPED'03: PROCEEDINGS OF THE 2003 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2003, : 164 - 167
- [9] Periareolar reduction mammoplasty using an inferior dermal pedicle or a central pedicle [J]. JOURNAL OF PLASTIC RECONSTRUCTIVE AND AESTHETIC SURGERY, 2008, 61 (03): : 275 - 281