Virtual Voltage Vectors Based Space Vector PWM Method for Five Phase Voltage Source Inverters

被引：0
|
作者：
Yu B. [1 ]
Song W. [1 ]
Feng J. [1 ]
Song Y. [1 ]
Tang T. [1 ]
机构：
[1] School of Electrical Engineering, Southwest Jiaotong University, Chengdu, 610031, Sichuan Province
来源：
Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering | 2020年 / 40卷 / 01期
关键词：
Common mode voltage; Five-phase voltage source inverter; Low-order harmonics suppression; Space vector pulse width modulation (SYPWM);
D O I：
10.13334/j.0258-8013.pcsee.190158
中图分类号：
学科分类号：
摘要：
In multiphase machine drive system, the common mode voltage (CMV) resulting from the control and modulation schemes will bring electromagnetic interference, which leads the system to work abnormally. The CMV will also destroy the stator isolation, reduce the machine service life. Besides, the low-order harmonics in the phase currents increases copper losses and torque ripple. As a result, the system performance is deteriorated. In order to suppress the low-order harmonic currents and reduce the CMV, a virtual voltage vectors based space vector pulse width modulation (V3-SVPWM) scheme for five-phase VSIs was proposed. Firstly, four adjacent large vectors were selected to synthesize active virtual voltage vectors with the redefined duty ratio, zero virtual voltage vectors were synthesized with two opposing large vectors, according to volt-second balance law. Then, the reference voltage was synthesized using the virtual voltage vectors. The process was simple and easy to realize on embedded controllers. Finally, a performance comparison of the proposed V3-SVPWM, near-two vectors SVPWM (NTV-SVPWM) and near-four vectors SVPWM (NFV-SVPWM) schemes has been presented on Matlab/Simulink and experimental platform. Simulation and experimental results have verified the feasibility and effectiveness of the proposed V3-SVPWM scheme. © 2020 Chin. Soc. for Elec. Eng.
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页码：212 / 221
页数：9
相关论文
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