Design of an Process In-Memory Full Adder Based on Voltage-Controlled Spin Orbit Torque Magnetic Random Access Memory

With the feature size of complementary metal oxide semiconductor technology decreasing, the problem of static power consumption becomes more and more serious. Spin Magnetic Random Access Memory (MRAM) has been widely studied because of its nonvolatile, high-speed read-write ability, high integration density and CMOS compatibility. In this paper, a reconfigurable memory logic array is designed using a novel Voltage-Controlled Spin-Orbit Torque(VC-SOT) random access memory. It can implement all of Boolean Logic functions and highly parallel computing. On this basis, an in-memory computing Full Adder (FA) is designed and simulated in 40 nm process. The results show that the proposed full adder has higher parallelism, faster computation speed (～1.11 ns/bit) and lower computation power consumption (～5.07 fJ/bit). © 2023 Science Press. All rights reserved.