共 50 条
- [1] Efficient Utilization of Test Elevators to Reduce Test Time in 3D-ICs [J]. VLSI-SOC: INTERNET OF THINGS FOUNDATIONS, 2015, 464 : 21 - 38
- [2] Reducing Test Time for 3D-ICs by Improved Utilization of Test Elevators [J]. 2014 22ND INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2014,
- [3] Survey on 3D-ICs Thermal Modeling, Analysis, and Management Techniques [J]. 2017 IEEE 19TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2017,
- [4] Cost Modeling and Analysis for the Design, Manufacturing and Test of 3D-ICs [J]. 2015 INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC 2015), 2015,
- [5] Thermal Implications of Mobile 3D-ICs [J]. 2014 INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC), 2014,
- [7] DfT Techniques and Architectures for TSV-Based 3D-ICs: A Comparative Study [J]. PROCEEDINGS OF THE 18TH MEDITERRANEAN ELECTROTECHNICAL CONFERENCE MELECON 2016, 2016,
- [8] Electromigration-Aware Placement for 3D-ICs [J]. PROCEEDINGS OF THE SEVENTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN ISQED 2016, 2016, : 35 - 40
- [9] Effects of Packaging on Mechanical Stress in 3D-ICs [J]. 2015 IEEE 65TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2015, : 354 - 361
- [10] 3D-ICs created using oblique processing [J]. ADVANCES IN PATTERNING MATERIALS AND PROCESSES XXXIII, 2016, 9779