An SoC System for Real-Time Edge Detection

被引:0
|
作者
Yamini, Vanama [1 ]
Hussain, Syed Ali [1 ]
Sekhar, G. Chandra [1 ]
Kumar, P. Avinash [1 ]
Lehitha, P. [1 ]
Teja, B. Sree Venkata [1 ]
Samanta, Swagata [1 ]
Sanki, Pradyut Kumar [1 ]
机构
[1] SRM Univ, Dept Elect & Commun Engn, Amaravati 522502, Andhra Pradesh, India
关键词
FPGA; SoC; Zynq processor; Computer vision; Image processing; Hardware acceleration;
D O I
10.1007/s11664-024-11255-x
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This research work focuses on the design and implementation of a highly advanced field-programmable gate array (FPGA)-based system-on-chip (SoC) solution for real-time edge detection. By utilizing a Zynq processor and leveraging the powerful Vivado software, the aim is to overcome the significant computational challenges associated with achieving real-time edge detection. Edge detection in real-time scenarios presents several obstacles, including the possibility of missing edges due to noise and the substantial processing requirements of any edge detection technique. To address these challenges, the proposed SoC system synergistically combines the computational capabilities of an FPGA board and a Zynq processor, harnessing hardware acceleration to achieve high-performance edge detection. The OV7670 camera module serves as the primary input medium, capturing image frames for subsequent processing. These captured frames undergo initial processing before being seamlessly transferred to the FPGA fabric through customized intellectual property (IP) blocks. These IP blocks efficiently handle crucial tasks such as frame capturing, conversion to AXI Stream interface signals, and integration with the video direct memory access (VDMA) IP. The VDMA IP plays a pivotal role by facilitating high-speed data movement between the FPGA fabric and the Zynq processor IP, thereby enabling streamlined and efficient data transfer and processing. At the heart of this project lies the real-time edge detection algorithm, which is skillfully implemented on the Zynq processor. The resulting edge-detected frames are then visually presented and displayed on an output device utilizing the AXI4-Stream to Video Out IP. To ensure optimal utilization of available hardware resources, the comprehensive Vivado software suite provides a wide array of tools for designing, implementing, and programming the FPGA fabric. By leveraging FPGA-based systems, this project effectively addresses the critical need for real-time edge detection in time-sensitive scenarios. The result is a portable and manageable device that exhibits versatility, as it can be employed in various applications while reliably detecting edges in real-time situations.
引用
收藏
页码:6395 / 6402
页数:8
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