Graph Partitioning in the Implementation and Performance Optimization of A Hybrid Memory System

被引:0
|
作者
Li Q. [1 ]
Zhong J. [1 ]
Li X. [2 ]
机构
[1] College of Computer Science, Chongqing University, Chongqing
[2] School of Information Technology and Electrical Engineering, University of Queensland, Brisbane
来源
关键词
Balanced graph partitioning; Complex network; Hybrid memory; Memory computing; Non-volatile memory; Streaming partitioning;
D O I
10.11897/SP.J.1016.2019.02481
中图分类号
学科分类号
摘要
The tremendous scale of modern graph datasets has rapidly increased the demand for efficient algorithms for graph analysis. A standard approach distributes the graph over a cluster of computer nodes, but the performing computations on a distributed graph is expensive if the large amount of data has to be moved. Graph partitioning is the precondition of distributed graph computing framework, which is a key problem in improving the performance of distributed graph computing. Streaming graph partitioning is more efficient compared with offline partitioning, it has been developed continuously in the application of graph partitioning in recent years. Because of the limitation of memory capacity, the single commodity type computer is difficult to partition and optimize the massive graphs. Existing methods mainly use distributed cluster to process these large graph partitioning, while distributed computational resources have become more accessible, developing distributed graph partitioning algorithms still remains challenging, especially to non-experts. NVM storage has the advantages of low power consumption, high density, low latency and byte-addressable, which is the construction of high performance storage system and an important means to improve the performance big data system. But NVM storage also has some disadvantages, such as writing power consumption is higher than reading, write latency is higher than read, and the write counts of NVM is limited. The asymmetry problem about read and write in NVM should be paid more attention when using the hybrid NVM and DRAM memory. In this work, we explore to partition the large graphs under single compute node with hybrid NVM and DRAM memory. We propose a management strategy based on adjacent edge structure for dynamic cached data (AeFdy). This strategy converts the cached data structure from the adjacent vertex structure in the original streaming algorithms to the adjacent edge structure. The experimental results on 7 real-world graphs show that the average partitioning time of the new method is 4.9 times faster than that of original method. At the same time, the strategy evaluates the data pages in NVM and DRAM media by different models according to the characteristics of the streaming algorithm based on adjacent edge structure, places data pages in different memory media to reduce system migration operation times and improve the system performance. To demonstrate, the AeFdy strategy is simulated in the Linux kernel. Compared with the existing hybrid memory management strategy, such as Linux Swap, M-CLOCK and Dr.Swap, AeFdy improves the system performance by 128.5%, 87.4% and 50.4% respectively. © 2019, Science Press. All right reserved.
引用
收藏
页码:2481 / 2498
页数:17
相关论文
共 53 条
  • [1] Mao W., Liu J.-N., Tong W., Et al., A review of storage technology research based on phase change memory, Chinese Journal of Computers, 38, 5, pp. 944-958, (2015)
  • [2] Ruocco S., Le D.K., Efficient persistence of financial transactions in NVM-based cloud data centers, Proceedings of the International Conference on Cloud Computing Research and Innovation, pp. 25-36, (2016)
  • [3] Stitt G., Grattan B., Villarreal J., Et al., Using on-chip configurable logic to reduce embedded system software energy, Proceedings of the Field-Programmable Custom Computing Machines, pp. 143-151, (2002)
  • [4] Wong H.S.P., Raoux S., Kim S.B., Et al., Phase change memory, Proceedings of the IEEE, 98, 12, pp. 2201-2227, (2010)
  • [5] Jung M., Shalf J., Kandemir M., Design of a large-scale storage-class RRAM system, Proceedings of the International ACM Conference on International Conference on Supercomputing, pp. 103-114, (2013)
  • [6] Raoux S., Burr G.W., Breitwisch M.J., Et al., Phase-change random access memory: A scalable technology, IBM Journal of Research & Development, 52, 4-5, pp. 465-480, (2008)
  • [7] Zhou P., Zhao B., Yang J., Et al., A durable and energy efficient main memory using phase change memory technology, Proceedings of the 36th International Symposium on Computer Architecture, pp. 14-23, (2009)
  • [8] Sharma A., Tyagi V.V., Chen C.R., Et al., Review on thermal energy storage with phase change materials and applications, Renewable& Sustainable Energy Reviews, 13, 2, pp. 318-345, (2009)
  • [9] Zhang W., Li T., Exploring phase change memory and 3D die-stacking for power/thermal friendly, fast and durable memory architectures, Proceedings of the 200918th International Conference on Parallel Architectures and Compilation Techniques, pp. 101-112, (2009)
  • [10] Schonhals A., Mohr J., Wouters D.J., Et al., 3-bit resistive RAM write-read scheme based on complementary switching mechanism, IEEE Electron Device Letters, 38, 4, pp. 449-452, (2017)