DESIGN AND VERIFICATION OF A CMOS TRANSCONDUCTANCE CELL WITH EXTENDED LINEARITY

A fully CMOS tunable transconductance cell is presented. The key element of the circuit is an MOS transistor operated in the triode region with an adjustable constant drain-to-source voltage. The cell can be used in both single-ended-input and differential-input configurations. Both design considerations and measurements performed on integrated test structures are presented. The cell shows a very good linearity over a large dynamic range. For the cell used in the differential configuration, the measured total harmonic distortion is as good as -53 dB and -43 dB with a differential input signal peak amplitude of 3 V and 6 V, respectively, when the supply voltage is equal to +/- 5 V. The cell also shows very good performance up to several megahertz.