TESTER ARCHITECTURE FOR A TIME-DIVISION SWITCH

被引：1
|
作者：
JAJSZCZYK, A [1 ]
TYSZER, J [1 ]
机构：
[1] POZNAN TECH UNIV,CTR COMP,PL-60965 POZNAN,POLAND
来源：
ELECTRONICS LETTERS | 1987年 / 23卷 / 20期
关键词：
D O I：
10.1049/el:19870744
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：1064 / 1066
页数：3
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