HARDWARE ACCELERATORS FOR TIMING SIMULATION OF VLSI DIGITAL CIRCUITS

被引：1
|
作者：
LEWIS, DM
机构：
[1] Univ of Toronto, Toronto, Ont, Can
来源：
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1988年 / 7卷 / 11期
关键词：
Manuscript received May 22; 1986; revised February 7; 1987; January; 26; 1988; and June 1; 1988. This work was supported by the Natural Sciences and Engineering Research Council of Canada. The review of this paper was arranged by Associate Editors A. R. Newton and R. K. Brayton. The author is with the Department of Electrical Engineering; University of Toronto; Toronto; Canada M5S 1A4. IEEE Log Number 8822640;
D O I：
10.1109/43.9184
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
36
引用
收藏
页码：1134 / 1149
页数：16
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