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- [2] A Construction of Matroidal Error Correcting Networks 2012 INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY AND ITS APPLICATIONS (ISITA 2012), 2012, : 401 - 405
- [3] A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks 23RD IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT-TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2008, : 176 - 183
- [6] Optimal Networks from Error Correcting Codes 2013 ACM/IEEE SYMPOSIUM ON ARCHITECTURES FOR NETWORKING AND COMMUNICATIONS SYSTEMS (ANCS), 2013, : 169 - 179
- [8] Error-correcting codes and neural networks SELECTA MATHEMATICA-NEW SERIES, 2018, 24 (01): : 521 - 530
- [10] Adversarial Neural Networks for Error Correcting Codes 2021 IEEE GLOBAL COMMUNICATIONS CONFERENCE (GLOBECOM), 2021,