DESIGN OF SMALL PLATED-WIRE MEMORIES WITH HIGH RELIABILITY

被引：0

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作者：

SATO, W

MIYOSHI, T

MORI, N

KUBO, T

KOBAYASH.H

机构：

来源：

NEC RESEARCH & DEVELOPMENT | 1972年 / 26期

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中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

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页码：122 / +

页数：1

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