New Residue Number System Scaler for the Three-Moduli Set {2(n+1) - 1, 2(n), 2(n)- 1}

被引:8
|
作者
Hiasat, Ahmad [1 ]
机构
[1] Princess Sumaya Univ Technol, Dept Comp Engn, Sch Engn, POB 1438, Amman 11941, Jordan
关键词
residue number system; scaling; computer arithmetic; VLSI design;
D O I
10.3390/computers7030046
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
This work proposes the first scaler designed specifically for the three-moduli set M-1 = {2(n+1) - 1, 2(n), 2(n) - 1}. Hence, there is no other functionally similar scaler to compare the proposed scaler with. However, when compared with the latest published scalers for a different moduli set, M-2 = {2(n) + 1,2(n), 2(n) - 1}, the proposed scaler has a better area and power performance, while it requires a longer time delay. As demonstrated in earlier publications, replacing the (2(n) + 1) channel in the M-2 moduli set by the (2(n+1) - 1) channel, to form the M-1 moduli set, considerably improves the overall time performance of residue-based multiply-accumulate arithmetic units.
引用
收藏
页数:7
相关论文
共 50 条