CACHE MEMORY REPLACEMENT POLICY FOR A UNIPROCESSOR SYSTEM

被引：2
|
作者：
COLAGIOVANNI, L
SHAOUT, A
机构：
[1] Electrical and Computer Engineering Department, University of Michigan, Michigan, Dearborn
来源：
ELECTRONICS LETTERS | 1990年 / 26卷 / 08期
关键词：
Memories;
D O I：
10.1049/el:19900331
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Cache memory hierarchies are used to buffer those portions of main memory with the most frequent use by the CPU. As cache memory is very costly, good design techniques must consider small cache sizes maintaining high levels of use (hit ratio) and ease of implementation. The memory replacement policy is important in maintaining a high hit ratio. Most replacement policies used are easily implemented when the main memory has fixed page locations. A new cache algorithm using a variable page configuration is explained in terms of program behaviour. © 1990, The Institution of Electrical Engineers. All rights reserved.
引用
收藏
页码：509 / 510
页数：2
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