MULTIPLICATION DIVISION SQUARE-ROOT MODULE FOR MASSIVELY-PARALLEL COMPUTERS

被引:0
|
作者
ERCEGOVAC, MD [1 ]
LANG, T [1 ]
机构
[1] UNIV CALIF IRVINE,DEPT ELECT & COMP ENGN,IRVINE,CA 92717
基金
美国国家科学基金会;
关键词
MULTIPLICATION; DIVISION; SQUARE ROOT; BYTE ARITHMETIC; MASSIVELY PARALLEL COMPUTERS;
D O I
10.1016/0167-9260(93)90022-5
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present algorithms for n-bit multiplication, division and square root suitable for execution in k < n-bit wide processing elements in massively parallel computers. A combined implementation is proposed and its performance in terms of the number of instructions required is evaluated.
引用
收藏
页码:221 / 234
页数:14
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