共 50 条
- [1] ON THE ACCELERATION OF FAULT SIMULATION IN COMBINATIONAL-CIRCUITS [J]. AEU-ARCHIV FUR ELEKTRONIK UND UBERTRAGUNGSTECHNIK-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 1986, 40 (06): : 355 - 362
- [3] SIMULATION OF COMBINATIONAL-CIRCUITS FOR FAULT-DIAGNOSIS [J]. SIMULATION, 1993, 60 (04) : 235 - 245
- [8] A FAULT-DETECTION TEST FOR COMBINATIONAL-CIRCUITS [J]. AUTOMATION AND REMOTE CONTROL, 1981, 42 (08) : 1117 - 1122