A 200-MHZ CMOS X/SIN(X) DIGITAL-FILTER FOR COMPENSATING D/A CONVERTER FREQUENCY-RESPONSE DISTORTION

A 200-MHz 11-tap FIR digital filter for compensating the sin(x)/x spectrum distortion introduced by digital-to-analog (D/A) converters has been designed and fabricated in a 1-mu-m CMOS technology. The chip core area is 1.91 X 3.28 mm2 and its complexity is approximately 14 000 transistors. A fully parallel bit-level pipelined transpose-form carry-save architecture using simple powers-of-2 coefficients was used to achieve high throughput as well as low complexity. The various trade-offs involving architecture selection, circuit design, and timing issues are presented and the difficulties in realizing the speed potential of bit-level pipelined circuits are also discussed.