A SIMPLE YET EFFECTIVE TECHNIQUE FOR GLOBAL WIRING

被引：50
|
作者：
NAIR, R
机构：
[1] IBM, T. J. Watson Research Cent,, Yorktown Heights, NY, USA, IBM, T. J. Watson Research Cent, Yorktown Heights, NY, USA
来源：
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1987年 / 6卷 / 02期
关键词：
MATHEMATICAL TECHNIQUES - Graph Theory;
D O I：
10.1109/TCAD.1987.1270260
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A simple algorithm to perform global wiring is described. Repeated iterations of the algorithm tend to improve the quality of wiring by rerouting around congested areas. Various parameters can be set to give preference to short routes or to reduce the time taken by the algorithm. The algorithm has been tried out for several master-slice chips containing up to 3500 cells with good results. The technique is easily extended to standard cell chip design. An implementation for global wiring of a structured custom chip design style is described along with results. The technique is adaptable to higher level packaging such as chips on modules or modules on a board.
引用
收藏
页码：165 / 172
页数：8
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