A FLEXIBLE ARCHITECTURE FOR REAL-TIME SPEECH RECOGNITION

被引：1
|
作者：
MORENO, F [1 ]
ALEXANDRES, S [1 ]
MENESES, J [1 ]
机构：
[1] UPM,ETSI TELECOMUN,DEPT ELECTR ENGN,E-28040 MADRID,SPAIN
来源：
MICROPROCESSING AND MICROPROGRAMMING | 1993年 / 37卷 / 1-5期
关键词：
VLSI; PIPELINE; RECOGNITION; REAL-TIME;
D O I：
10.1016/0165-6074(93)90018-G
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper is about the real-time implementation of a speech recognition system for Spanish. A VLSI architecture, for implementing the Viterbi Algorithm, is employed in order to provide it with the necessary processing speed.
引用
收藏
页码：69 / 72
页数：4
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