A MULTIPLE FAULT-TOLERANT PROCESSOR NETWORK ARCHITECTURE FOR PIPELINE COMPUTING

被引：4
|
作者：
TYSZER, J
机构：
[1] Technical Univ of Poznan, Poznan, Pol
来源：
IEEE TRANSACTIONS ON COMPUTERS | 1988年 / 37卷 / 11期
关键词：
FAULT TOLERANT MULTIPROCESSOR NETWORKS - LINEAR ARRAY NETWORK ARCHITECTURE - PIPELINE COMPUTING;
D O I：
10.1109/12.8707
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：1414 / 1418
页数：5
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