USING THE C-V CURVE OF AN MIS DIODE TO EXAMINE THE TRAPPING LEVELS IN A SEMICONDUCTOR CONTAINING MANY DISCRETE TRAPS

被引:0
|
作者
COOK, RK [1 ]
KASOLD, JP [1 ]
JONES, KA [1 ]
机构
[1] DARTMOUTH COLL, THAYER SCH ENGN, HANOVER, NH 03755 USA
关键词
D O I
10.1016/0038-1101(80)90207-5
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:391 / 397
页数:7
相关论文
共 4 条
  • [1] COMPUTER ANALYSIS OF EFFECTS OF ANNEALING ON InP INSULATOR-SEMICONDUCTOR INTERFACE PROPERTIES USING MIS C-V CURVES.
    He, Li
    Hasegawa, Hideki
    Sawada, Takayuki
    Ohno, Hideo
    [J]. Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes, 1988, 27 (04): : 512 - 521
  • [2] A COMPUTER-ANALYSIS OF EFFECTS OF ANNEALING ON INP INSULATOR-SEMICONDUCTOR INTERFACE PROPERTIES USING MIS C-V CURVES
    HE, L
    HASEGAWA, H
    SAWADA, T
    OHNO, H
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1988, 27 (04): : 512 - 521
  • [3] Investigation of diode parameters using I-V and C-V characteristics of In/SiO2/p-Si (MIS) Schottky diodes
    Yuksel, O. F.
    Selcuk, A. B.
    Ocak, S. B.
    [J]. PHYSICA B-CONDENSED MATTER, 2008, 403 (17) : 2690 - 2697
  • [4] Mapping of Interface Traps in High-Performance Al2O3/AlGaN/GaN MIS-Heterostructures Using Frequency- and Temperature-Dependent C-V Techniques
    Yang, Shu
    Tang, Zhikai
    Wong, King-Yuen
    Lin, Yu-Syuan
    Lu, Yunyou
    Huang, Sen
    Chen, Kevin J.
    [J]. 2013 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2013,